Ryujinx/ChocolArm64
LDj3SNuD 68300368d7 Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380)
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Instructions.cs

* Update CpuTestSimdReg.cs

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdCrypto.cs
2018-08-27 03:44:01 -03:00
..
Decoder Added support for more shader instructions and texture formats, fix swapped channels in RGB565 and RGBA5551? texture formats, allow zero values on blending registers, initial work to build CFG on the shader decoder, update the BRA instruction to work with it (WIP) 2018-05-29 20:37:10 -03:00
Decoder32
Events Implement SvcGetThreadContext3 2018-06-26 01:10:15 -03:00
Exceptions More flexible memory manager (#307) 2018-08-15 15:59:51 -03:00
Instruction Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380) 2018-08-27 03:44:01 -03:00
Instruction32
Memory Code style fixes and nits on the HLE project (#355) 2018-08-16 20:47:36 -03:00
State Code style fixes and nits on the HLE project (#355) 2018-08-16 20:47:36 -03:00
Translation Code style fixes and nits on the HLE project (#355) 2018-08-16 20:47:36 -03:00
ABitUtils.cs
AOpCodeTable.cs Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380) 2018-08-27 03:44:01 -03:00
AOptimizations.cs More flexible memory manager (#307) 2018-08-15 15:59:51 -03:00
AThread.cs Code style fixes and nits on the HLE project (#355) 2018-08-16 20:47:36 -03:00
ATranslatedSub.cs
ATranslatedSubType.cs
ATranslator.cs
ChocolArm64.csproj Add linux-x64 to RID property to make tests works on linux (#205) 2018-06-30 12:43:04 -03:00