LDj3SNuD a5ad1e9a06 Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) ... * Update AOpCodeTable.cs * Update AInstEmitSimdLogical.cs * Update AInstEmitSimdArithmetic.cs * Update ASoftFallback.cs * Update AInstEmitAlu.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimdReg.cs * Update CpuTestSimd.cs		2018-04-25 23:20:22 -03:00
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Tester	Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)	2018-04-25 23:20:22 -03:00
CpuTest.cs
CpuTestAlu.cs
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRx.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMov.cs
CpuTestMul.cs
CpuTestScalar.cs	Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)	2018-04-19 00:22:12 -03:00
CpuTestSimd.cs	Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)	2018-04-25 23:20:22 -03:00
CpuTestSimdArithmetic.cs	Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)	2018-04-19 00:22:12 -03:00
CpuTestSimdMove.cs
CpuTestSimdReg.cs	Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)	2018-04-25 23:20:22 -03:00